The present invention relates to a process for producing semiconductor devices, and particularly to a process for producing semiconductor devices having vertical pnp transistors.
Pnp transistors are essential in current technology and play an important role in bipolar circuits. However, pnp transistors exhibit performance characteristics such as current amplification factor h.sub.fe and gain-bandwidth product f.sub.T which are considerably inferior to those of the npn transistor. With the npn transistor, for instance, a gain-bandwidth product f.sub.T of about 100 MHz can be realized. With the pnp transistor, however, the gain-bandwidth product f.sub.T is several MHz at best.
Poor performance of the pnp transistor can be attributed to the following reasons:
(1) The pnp transistor is usually constructed in a lateral configuration in which p-type layers are arranged in the lateral direction while using an epitaxial n-type layer in its own form, as disclosed in "Integrated Circuit Engineering (1)" published by Corona Publishing Co., 1979, pp. 165-168. With this structure, most of the positive holes injected through the emitter are stored in the epitaxial layer, and only a small proportion of positive holes arrive at the collector.
(2) The base width W.sub.B, which is an important parameter in determining transistor performance, varies depending upon the processing precision of the photomask and the photoresist and depending upon the diffusion conditions of the emitter and collector. Namely, it is difficult to control the base width W.sub.B, or it is difficult to greatly reduce the base width.
(3) Distribution of impurity concentration varies in the epitaxial layer that works as a base.
In view of the above-mentioned respects, the inventors have prepared a pnp transistor of a vertical structure like the npn transistor, in an effort to enhance the performance.
The inventors have further clarified, through study of the subject, that the number of manufacturing steps increases considerably if it is attempted to form an npn transistor and a vertical pnp transistor in the same semiconductor substrate, with a subsequent increase in manufacturing costs.